New characterization method for accurate capacitor matching measurements using pseudo-floating gate test structures in submicron CMOS and BICMOS technologies

IEEE International Conference on Microelectronic Test Structures

Volumn , Issue , 1998, Pages 223-227

  Roux dit Buisson, O ^a   Morin, G ^a   Paillardet, F ^a   Mazaleyrat, E ^a  

^a STMICROELECTRONICS   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE MEASUREMENT; CAPACITORS; INTEGRATED CIRCUIT TESTING; MATHEMATICAL MODELS;

CAPACITOR MATCHING MEASUREMENT; PSEUDO-FLOATING GATE TEST STRUCTURES;

CMOS INTEGRATED CIRCUITS;

EID: 0031620895     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)