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Volumn , Issue , 1998, Pages
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Architectural and compiler support for energy reduction in the memory hierarchy of high performance microprocessors
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Author keywords
[No Author keywords available]
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Indexed keywords
BUFFER STORAGE;
COMPUTER SIMULATION;
PROGRAM COMPILERS;
STORAGE ALLOCATION (COMPUTER);
COMPILER OPTIMIZATION;
MICROPROCESSOR CHIPS;
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EID: 0031619877
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1145/280756.280788 Document Type: Conference Paper |
Times cited : (43)
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References (17)
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