33 nm Ultra-shallow junction technology by oxygen-free and point-defect reduction process

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 1998, Pages 134-135

  Shishiguchi, S ^a   Mineji, A ^a   Yasunaga, T ^a   Saito, S ^a  

^a NEC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

AMORPHIZATION; ANNEALING; DIFFUSION IN SOLIDS; ELECTRIC CURRENTS; ELECTRIC RESISTANCE; ION IMPLANTATION; MOSFET DEVICES; POINT DEFECTS; SEMICONDUCTOR DEVICE MANUFACTURE;

ULTRA-SHALLOW JUNCTION TECHNOLOGY;

SEMICONDUCTOR JUNCTIONS;

EID: 0031619817     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)