Technology map ing for large complex plds

Proceedings - Design Automation Conference

Volumn , Issue , 1998, Pages 698-703

  Anderson, Jason Helge ^a   Brown, Stephen Dean ^a  

^a UNIVERSITY OF TORONTO   (Canada)

Author keywords

Pla style logic blocks; Programmable logic devices; Technology mapping

Indexed keywords

CONFORMAL MAPPING; LOGIC DEVICES; ALGORITHMS; LOGIC DESIGN; LOGIC GATES;

LOGIC BLOCKS; MULTILEVELS; NEW TECHNOLOGIES; PROGRAMMABLE LOGIC DEVICE; SYNTHESIS TECHNIQUES; TECHNOLOGY MAPPING;

COMPUTER CIRCUITS; LOGIC CIRCUITS;

COMPLEX PROGRAMMABLE LOGIC DEVICES (CPLD); TECHNOLOGY MAPPING;

EID: 0031619178     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (15)

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