Control speculation in multithreaded processors through dynamic loop detection

IEEE High-Performance Computer Architecture Symposium Proceedings

Volumn , Issue , 1998, Pages 14-23

  Tubella, Jordi ^a   Gonzalez, Antonio ^a  

^a UNIVERSITAT POLITÈCNICA DE CATALUNYA   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; ERROR DETECTION; PROGRAM DEBUGGING;

CONTROL SPECULATION; DYNAMIC LOOP DETECTION; MULTITHREADED PROCESSORS;

PARALLEL PROCESSING SYSTEMS;

EID: 0031610923     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (13)