Performance modeling and code partitioning for the DS architecture

Conference Proceedings - Annual International Symposium on Computer Architecture, ISCA

Volumn , Issue , 1998, Pages 293-304

  Zhang, Yinong ^a   Adams III, George B ^a  

^a ADVANCED MICRO DEVICES   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE; COMPUTER SIMULATION; COMPUTER SOFTWARE; MATHEMATICAL MODELS; PARALLEL PROCESSING SYSTEMS; PERFORMANCE; PROGRAM PROCESSORS; VLSI CIRCUITS;

CODE PARTITIONING; INSTRUCTION LEVEL PARALLELISM; MICROARCHITECTURES; SINGLE CHIP MULTIPROCESSOR; SUPERSCALAR PROCESSOR; MICROARCHITECTURE;

COMPUTER ARCHITECTURE;

EID: 0031594028     PISSN: 08847495     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (25)