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Volumn 33, Issue 10, 1997, Pages 858-860

Highly accurate cyclic CMOS time-to-digital converter with extremely low power consumption

Author keywords

CMOS integrated circuits; Instrumentation

Indexed keywords

ELECTRIC DELAY LINES; ELECTRIC VARIABLES MEASUREMENT; ELECTRIC WIRING; ENERGY UTILIZATION; POWER CONVERTERS;

EID: 0031559310     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:19970594     Document Type: Article
Times cited : (14)

References (3)
  • 2
    • 0029375721 scopus 로고
    • A low-power CMOS time-to-digital converter
    • RÄISÄNEN-RUOTSALAINEN, E.: 'A low-power CMOS time-to-digital converter', IEEE J. Solid State Circuits, 1995, 30, (9), pp. 984-990
    • (1995) IEEE J. Solid State Circuits , vol.30 , Issue.9 , pp. 984-990
    • Räisänen-Ruotsalainen, E.1
  • 3
    • 0027642572 scopus 로고
    • The use of stabilized CMOS delay lines for the digitization of short time intervals
    • RAHKONEN T.E.: 'The use of stabilized CMOS delay lines for the digitization of short time intervals', IEEE J. Solid State Circuits, 1993, 28, (8), pp. 887-894
    • (1993) IEEE J. Solid State Circuits , vol.28 , Issue.8 , pp. 887-894
    • Rahkonen, T.E.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.