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Volumn 46, Issue 5, 1997, Pages 603-610

Selective victim caching: A method to improve the performance of direct-mapped caches

Author keywords

Cache simulation; Data cache; Direct mapped cache; Instruction cache; Victim cache

Indexed keywords

COMPUTER SIMULATION; PIPELINE PROCESSING SYSTEMS; STORAGE ALLOCATION (COMPUTER);

EID: 0031386642     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/12.589235     Document Type: Article
Times cited : (24)

References (17)
  • 1
    • 0025429331 scopus 로고
    • Improving Direct-Mapped Cache Performance by the Addition of a Small Fully-Associative Cache and Prefetch Buffers
    • May
    • N. Jouppi, "Improving Direct-Mapped Cache Performance by the Addition of a Small Fully-Associative Cache and Prefetch Buffers," Proc. 17th Int'l Symp. Computer Architecture, pp. 364-373, May 1990.
    • (1990) Proc. 17th Int'l Symp. Computer Architecture , pp. 364-373
    • Jouppi, N.1
  • 3
    • 0020177251 scopus 로고
    • Cache Memories
    • Sept.
    • A. Smith, "Cache Memories," Computing Surveys, vol. 14, pp. 473-530, Sept. 1982.
    • (1982) Computing Surveys , vol.14 , pp. 473-530
    • Smith, A.1
  • 4
    • 0024173488 scopus 로고
    • A Case for Direct-Mapped Caches
    • Dec.
    • M. Hill, "A Case for Direct-Mapped Caches," Computer, vol. 21, no. 12, pp. 25-40, Dec. 1988.
    • (1988) Computer , vol.21 , Issue.12 , pp. 25-40
    • Hill, M.1
  • 8
    • 0027192667 scopus 로고
    • Column-Associative Caches: A Technique for Reducing the Miss Rate of Direct-Mapped Caches
    • May
    • A. Agarwal and S. Pudar, "Column-Associative Caches: A Technique for Reducing the Miss Rate of Direct-Mapped Caches," Proc. 20th Int'l Symp. Computer Architecture, pp. 179-190, May 1993.
    • (1993) Proc. 20th Int'l Symp. Computer Architecture , pp. 179-190
    • Agarwal, A.1    Pudar, S.2
  • 9
    • 0002662988 scopus 로고
    • The Alpha AXP Architecture and 21064 Processor
    • June
    • E. McLellan, "The Alpha AXP Architecture and 21064 Processor," IEEE Micro, vol. 13, no. 3, pp. 36-47, June 1993.
    • (1993) IEEE Micro , vol.13 , Issue.3 , pp. 36-47
    • McLellan, E.1
  • 10
    • 0026904396 scopus 로고
    • An Analytical Access Time Model for On-Chip Cache Memories
    • T. Wada, S. Rajan, and S. Przybylski, "An Analytical Access Time Model for On-Chip Cache Memories," IEEE J. Solid-State Circuits, vol. 27, no. 8, 1992.
    • (1992) IEEE J. Solid-State Circuits , vol.27 , Issue.8
    • Wada, T.1    Rajan, S.2    Przybylski, S.3
  • 17
    • 33747396714 scopus 로고
    • Selective Victim Caching: A Method to Improve the Performance of Direct-Mapped Caches
    • U.C. Santa Cruz
    • D. Stiliadis and A. Varma, "Selective Victim Caching: A Method to Improve the Performance of Direct-Mapped Caches," Tech. Rep. UCSC-CRL-93-41, U.C. Santa Cruz, 1993 (http:/ / www.cse.ucsc.edu/ research/ hsnlab/ publications.html).
    • (1993) Tech. Rep. UCSC-CRL-93-41
    • Stiliadis, D.1    Varma, A.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.