Heterogeneous reconfigurable systems

IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation

Volumn , Issue , 1997, Pages 24-34

  Rabaey, Jan M ^a   Abnous, Arthur ^a   Ichikawa, Yuji ^a   Seno, Katsunori ^a   Wan, Marlene ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL COMPLEXITY; DIGITAL SIGNAL PROCESSING; MICROPROGRAMMING; OPTIMIZATION;

PARTITIONING TECHNIQUES; RECONFIGURABLE COMPUTER ARCHITECTURES;

COMPUTER ARCHITECTURE;

EID: 0031384037     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (15)