New SRAM cell design using 0.35 μm CMOS/SIMOX technology

IEEE International SOI Conference

Volumn , Issue , 1997, Pages 174-175

  Kumagai, Kouichi ^a   Yamada, Takashi ^a   Iwaki, Hiroaki ^a   Nakamura, Hiroyuki ^a   Onishi, Hideaki ^a   Matsubara, Yoshihisa ^a   Imai, Kiyotaka ^a   Kurosawa, Susumu ^a  

^a NEC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; RANDOM ACCESS STORAGE;

SEPARATION BY IMPLANTATION OF OXYGEN (SIMOX); STATIC RANDOM ACCESS MEMORY (SRAM) CELL;

SILICON ON INSULATOR TECHNOLOGY;

EID: 0031382797     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)