Macroscopic substrate noise model for full chip mixed-signal design verification

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 1997, Pages 37-38

  Nagata, Makoto ^a   Iwata, Atsushi ^a  

^a HIROSHIMA UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; INTEGRATED CIRCUIT LAYOUT; MATHEMATICAL MODELS; SPURIOUS SIGNAL NOISE; SUBSTRATES; VLSI CIRCUITS;

MACROSCOPIC SUBSTRATE NOISE MODELS;

ANALOG TO DIGITAL CONVERSION;

EID: 0031380431     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)