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Volumn 2, Issue , 1997, Pages 1130-1133
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Estimation of maximum switching activity in digital VLSI circuits
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Author keywords
[No Author keywords available]
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Indexed keywords
ALGORITHMS;
DIGITAL INTEGRATED CIRCUITS;
INTEGRATED CIRCUIT LAYOUT;
MATHEMATICAL MODELS;
SWITCHING FUNCTIONS;
VECTORS;
MAXIMUM SWITCHING ACTIVITY;
ZERO GATE DELAY MODEL;
VLSI CIRCUITS;
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EID: 0031380409
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (7)
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References (10)
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