PHDD: An efficient graph representation for floating point circuit verification

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers

Volumn , Issue , 1997, Pages 2-7

  Chen, Yirng An ^a   Bryant, Randal E ^a  

^a CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BOOLEAN FUNCTIONS; DATA STRUCTURES; DIGITAL ARITHMETIC; ELECTRIC NETWORK ANALYSIS; ELECTRIC NETWORK SYNTHESIS; GRAPH THEORY; MULTIPLYING CIRCUITS;

FLOATING POINT MULTIPLIERS; POWER HYBRID DECISION DIAGRAMS (PHDD);

DECISION THEORY;

EID: 0031378495     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)