Challenges of nitride spacer processing for a 0.35μm CMOS technology

IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop

Volumn , Issue , 1997, Pages 228-233

  Goss, Michael ^a   Thornburg, Russell ^a  

^a Digital Semiconductor   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHEMICAL VAPOR DEPOSITION; CMOS INTEGRATED CIRCUITS; ETCHING; NITRIDES; OXIDATION; OXIDES; SILICON WAFERS; THERMAL EFFECTS; THIN FILMS; TRANSMISSION ELECTRON MICROSCOPY;

LIQUID PHASE CHEMICAL VAPOR DEPOSITION; NITRIDE SPACER; OXIDE SPACER; THERMAL OXIDATION;

SEMICONDUCTOR DEVICE MANUFACTURE;

EID: 0031376844     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)