Improved PIN diode circuit model with automatic parameter extraction technique

IEE Proceedings: Circuits, Devices and Systems

Volumn 144, Issue 6, 1997, Pages 329-334

  Strollo, A G M ^a   Napoli, E ^a  

^a UNIVERSITY OF NAPLES FEDERICO II   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER AIDED LOGIC DESIGN; ELECTRIC NETWORK PARAMETERS; OPTIMIZATION; POWER ELECTRONICS; RANDOM PROCESSES; SEMICONDUCTOR DEVICE MODELS; SWITCHING CIRCUITS;

CIRCUIT PARAMETER EXTRACTION; PIN DIODE CIRCUITS; POWER CIRCUITS; STOCHASTIC GLOBAL OPTIMIZATION;

DIODE TRANSISTOR LOGIC CIRCUITS;

EID: 0031376569     PISSN: 13502409     EISSN: None     Source Type: Journal    
DOI: 10.1049/ip-cds:19971487     Document Type: Article

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