Process optimization by reducing I-D bias for 0.25-um logic devices

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 3051, Issue , 1997, Pages 170-181

  Park, Ki Yeop ^a   Choi, Byoung Il ^a   Lee, Won Gyu ^a   Ko, Chul Gi ^a  

^a Hynix Semiconductor Inc   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; OPTIMIZATION; PHOTOLITHOGRAPHY; PHOTORESISTS; PROXIMITY SENSORS;

DEEP ULTRAVIOLET; OPTICAL MICROLITHOGRAPHY; OPTICAL PROXIMITY EFFECTS; RESIST PATTERNS; SOFTWARE PACKAGE SOLID-C;

LOGIC DEVICES;

EID: 0031374474     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)