Iddq fault model generation for BiCMOS and CMOS circuits

Proceedings of the International Conference on Microelectronics

Volumn 2, Issue , 1997, Pages 771-774

  Panic, V ^a   Milovanovic, D ^a  

^a UNIVERSITY OF NI   (Serbia)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; ELECTRIC CURRENTS; GATES (TRANSISTOR); INTEGRATED CIRCUIT TESTING; VLSI CIRCUITS;

IDDQ TESTING; SOFTWARE PACKAGE PSPICE;

CMOS INTEGRATED CIRCUITS;

EID: 0031369843     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)