1.2 V, 16-bit audio A/D converter with suppressed latch error noise

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 1997, Pages 19-20

  Matsuya, Yasuyuki ^a   Terada, Jun ^a  

^a NTT CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUIT MANUFACTURE; SPURIOUS SIGNAL NOISE;

LATCH ERROR NOISE;

ANALOG TO DIGITAL CONVERSION;

EID: 0031368266     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/vlsic.1997.623781     Document Type: Conference Paper

References (3)