Decomposition and technology mapping of speed-independent circuits using Boolean relations

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers

Volumn , Issue , 1997, Pages 220-227

  Cortadella, Jordi ^a   Kishinevsky, Michael ^a   Kondratyev, Alex ^a   Lavagno, Luciano ^a   Pastor, Enric ^a   Yakovlev, Alex ^a  

^a UNIVERSITAT POLITÈCNICA DE CATALUNYA   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

BOOLEAN FUNCTIONS; ELECTRIC NETWORK ANALYSIS; ELECTRIC NETWORK SYNTHESIS; FUNCTION EVALUATION; LOGIC GATES; MATHEMATICAL MODELS; OPTIMIZATION;

BOOLEAN DECOMPOSITION; SPEED INDEPENDENT CIRCUITS; TECHNOLOGY MAPPING;

SEQUENTIAL CIRCUITS;

EID: 0031366625     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/iccad.1997.643524     Document Type: Conference Paper

References (18)