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Volumn , Issue , 1997, Pages 30-35

Guaranteeing testability in re-encoding for low power

Author keywords

[No Author keywords available]

Indexed keywords

BINARY DECISION DIAGRAMS (BDD); POWER ESTIMATION FUNCTION; TESTABILITY ESTIMATION;

EID: 0031362439     PISSN: 10817735     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ATS.1997.643912     Document Type: Conference Paper
Times cited : (4)

References (11)
  • 2
    • 0026913667 scopus 로고
    • Symbolic boolean manipulation with ordered binary decision diagrams
    • R. E. Bryant: Symbolic Boolean Manipulation with Ordered Binary Decision Diagrams, ACM Computing Surveys, Vol. 24, Nr. 3, 1992, pp. 293-318
    • (1992) ACM Computing Surveys , vol.24 , Issue.3 , pp. 293-318
    • Bryant, R.E.1
  • 6
    • 0004529209 scopus 로고
    • Synthesis for multiple-level logic from symbolic high level description languages
    • August
    • B. Lin, A.R. Newton, Synthesis for Multiple-level Logic From Symbolic High level Description Languages, proc IFIP Intl. Conf. on Very Large Scale Integration, August 1989, pp.187-196
    • (1989) Proc IFIP Intl. Conf. on Very Large Scale Integration , pp. 187-196
    • Lin, B.1    Newton, A.R.2
  • 10
    • 0028727571 scopus 로고
    • Low power state assignment targeting two- and multi-level logic implementations, proc
    • C.-Y. Tsui, M. Pedram, C.-A. Chen, A.M. Despain, Low Power State Assignment Targeting Two- and Multi-level Logic Implementations, proc. IEEE/ACM Intl. Conf. on CAD, 1994, pp. 82-87
    • (1994) IEEE/ACM Intl. Conf. on CAD , pp. 82-87
    • Tsui, C.-Y.1    Pedram, M.2    Chen, C.-A.3    Despain, A.M.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.