Modular reduction by multi-level table lookup

Midwest Symposium on Circuits and Systems

Volumn 1, Issue , 1997, Pages 381-384

  Parhami, Behrooz ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ADDERS; ELECTRIC NETWORK SYNTHESIS; FLIP FLOP CIRCUITS; LOGIC CIRCUITS; MULTIPLEXING EQUIPMENT;

MODULAR REDUCTION; MULTI LEVEL TABLE LOOKUP; PIPELINE LATCHES;

TABLE LOOKUP;

EID: 0031361971     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (14)