Fast low-energy VLSI binary addition

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn , Issue , 1997, Pages 676-684

  Parhi, Keshab K ^a  

^a UNIVERSITY OF MINNESOTA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BINARY CODES; CARRY LOGIC; ENCODING (SYMBOLS); MULTIPLEXING EQUIPMENT; REDUNDANCY; TREES (MATHEMATICS); VLSI CIRCUITS;

REDUNDANT TO BINARY CONVERSION;

ADDERS;

EID: 0031355568     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (13)