Fast VLSI binary addition

IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation

Volumn , Issue , 1997, Pages 232-241

  Parhi, Keshab K ^a  

^a UNIVERSITY OF MINNESOTA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CARRY LOGIC; CODE CONVERTERS; ENCODING (SYMBOLS); MULTIPLEXING; VLSI CIRCUITS;

REDUNDANT TO BINARY CONVERTERS;

ADDERS;

EID: 0031347824     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (13)