Scan synthesis for one-hot signals

IEEE International Test Conference (TC)

Volumn , Issue , 1997, Pages 714-722

  Mitra, Subhasish ^a   Avra, LaNae J ^a   McCluskey, Edward J ^a  

^a STANFORD UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DELAY CIRCUITS; INTEGRATED CIRCUIT LAYOUT; LOGIC DESIGN; SIGNAL GENERATORS;

BUILT IN SELF TEST (BIST) SCHEMES; ONE HOT SIGNALS;

INTEGRATED CIRCUIT TESTING;

EID: 0031343656     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (21)