Design of highly-parallel image processing systems using nanoelectronic devices

Computer Architectures for Machine Perception, Proceedings (CAMP)

Volumn , Issue , 1997, Pages 210-219

  Fountain, T J ^a  

^a UNIVERSITY COLLEGE LONDON   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; ELECTRONIC EQUIPMENT; ELECTRONICS PACKAGING; IMAGE PROCESSING; PIPELINE PROCESSING SYSTEMS; SYSTOLIC ARRAYS;

NANOELECTRONIC DEVICES; PROPAGATED INSTRUCTION PROCESSOR;

PARALLEL PROCESSING SYSTEMS;

EID: 0031342756     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)