Implementing area-time efficient VLSI residue to binary converters

IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation

Volumn , Issue , 1997, Pages 163-172

  Srikanthan, T ^a   Bhardwaj, M ^a   Clarke, C T ^a  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

Author keywords

[No Author keywords available]

Indexed keywords

ADDERS; BINARY CODES; CODE CONVERTERS; DIGITAL SIGNAL PROCESSING;

BIT UNFOLDING TECHNIQUES; COMPRESSED MULTIPLY ACCUMULATE (CMAC) CONVERTERS; UNCORRECTED RESIDUES TECHNIQUE;

VLSI CIRCUITS;

EID: 0031342097     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (14)