Multiple fault detection in logic resources of FPGAs

Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems

Volumn , Issue , 1997, Pages 186-194

  Huang, Wei Kang ^a   Meyer, Fred J ^a   Lombardi, Fabrizio ^a  

^a FUDAN UNIVERSITY   (China)

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUIT TESTING; LOGIC GATES; RANDOM ACCESS STORAGE; TREES (MATHEMATICS);

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

FAULT TOLERANT COMPUTER SYSTEMS;

EID: 0031339818     PISSN: 10636722     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)