Pulse-to-static conversion latch with a self-timed control circuit

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn , Issue , 1997, Pages 712-717

  Hwang, Wei ^a   Joshi, Rajiv V ^a   Henkels, Walter H ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; INTEGRATED CIRCUIT MANUFACTURE; TIMING CIRCUITS;

LEVEL SENSITIVE SCAN DESIGN (LSSD); PULSE TO STATIC CONVERSION LATCHES; SELF RESETTING COMPLEMENTARY METAL OXIDE SEMICONDUCTOR (SRCMOS);

FLIP FLOP CIRCUITS;

EID: 0031338476     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)