BART: A bridging fault test generator for sequential circuits

IEEE International Test Conference (TC)

Volumn , Issue , 1997, Pages 838-847

  Cusey, James P ^a   Patel, Janak H ^a  

^a Dallas Semiconductor   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMBINATORIAL CIRCUITS; COMPUTER AIDED NETWORK ANALYSIS; ELECTRIC FAULT CURRENTS; INTEGRATED CIRCUIT TESTING;

BRIDGING FAULT TEST GENERATOR (BART);

SEQUENTIAL CIRCUITS;

EID: 0031337485     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (19)