High-level area and power estimation for VLSI circuits

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers

Volumn , Issue , 1997, Pages 114-119

  Nemani, Mahadevamurty ^a   Najm, Farid N ^a  

^a UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BOOLEAN FUNCTIONS; COMBINATORIAL CIRCUITS; COMPUTATIONAL COMPLEXITY; ESTIMATION; INTEGRATED CIRCUIT LAYOUT; LOGIC GATES; MATHEMATICAL MODELS;

AREA COMPLEXITY; POWER ESTIMATION;

VLSI CIRCUITS;

EID: 0031336413     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/iccad.1997.643385     Document Type: Conference Paper

References (8)