Infrared imaging and backside failure analysis techniques on multilayer CMOS technology

Proceedings of the International Symposium on the Physical & Failure Analysis of Integrated Circuits, IPFA

Volumn , Issue , 1997, Pages 17-20

  Chen, Steven ^a   Shinseki, Brian ^a   Barutha, Cynthia ^a   Kha, Ty ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; INFRARED IMAGING; INTEGRATED CIRCUIT MANUFACTURE; MULTILAYERS; SUBSTRATES;

BACKSIDE SUBSTRATE THINNING TECHNIQUES; LASER SCANNING MICROSCOPY (LSM);

INTEGRATED CIRCUIT TESTING;

EID: 0031335141     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)