Checking formal specifications under simulation

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn , Issue , 1997, Pages 455-460

  Canfield, William ^a   Emerson, E Allen ^a   Saha, Avijit ^a  

^a CAES   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL COMPLEXITY; COMPUTER HARDWARE DESCRIPTION LANGUAGES; COMPUTER SIMULATION; FORMAL LOGIC;

FORMAL VERIFICATION;

MULTIPROCESSING SYSTEMS;

EID: 0031334368     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)