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Volumn , Issue , 1997, Pages 272-280

Approach for detecting bridging faults in CMOS domino logic circuits using dynamic power supply current monitoring

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC FAULT LOCATION; ELECTRIC INVERTERS; GATES (TRANSISTOR); LOGIC CIRCUITS; LOGIC GATES; POWER SUPPLY CIRCUITS;

EID: 0031333686     PISSN: 10636722     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DFTVS.1997.628334     Document Type: Conference Paper
Times cited : (6)

References (12)
  • 1
    • 85176672531 scopus 로고
    • Analysis of IDDQ Detectable Bridges in Combinational CMOS Circuits
    • E. Iserb J. Figuera Analysis of IDDQ Detectable Bridges in Combinational CMOS Circuits Proceedings of the Twelfth IEEE VLSI Test Symposium 368 373 Proceedings of the Twelfth IEEE VLSI Test Symposium 1994-April
    • (1994) , pp. 368-373
    • Iserb, E.1    Figuera, J.2
  • 2
    • 46249117986 scopus 로고
    • Classification of Bridging Faults in CMOS Circuits: Experimental Results and Implications for Test
    • S. F. Midkiff S. Wayne Bollinger Classification of Bridging Faults in CMOS Circuits: Experimental Results and Implications for Test Eleventh Annual IEEE VLSI Test Symposium 112 115 Eleventh Annual IEEE VLSI Test Symposium 1993-April
    • (1993) , pp. 112-115
    • Midkiff, S.F.1    Wayne Bollinger, S.2
  • 4
    • 0025481983 scopus 로고
    • Testing for Parametric Faults in Static CMOS Circuits
    • F. J. Ferguson M. Taylor T. Larrabee Testing for Parametric Faults in Static CMOS Circuits International Test Conference 436 443 International Test Conference 1990-September
    • (1990) , pp. 436-443
    • Ferguson, F.J.1    Taylor, M.2    Larrabee, T.3
  • 5
    • 85176680917 scopus 로고
    • Testing Oriented Analysis of CMOS ICs with Opens
    • W. Maly P. K. Nag P. Nigh Testing Oriented Analysis of CMOS ICs with Opens International Conference on Computer-Aided Design 347 377 International Conference on Computer-Aided Design 1988-November
    • (1988) , pp. 347-377
    • Maly, W.1    Nag, P.K.2    Nigh, P.3
  • 7
    • 0029233146 scopus 로고
    • The Concept of Resistance Interval: A New Parametric Model for Realistic Resistive Bridging Fault
    • M. Renovell P, Hue Y. Bertrand The Concept of Resistance Interval: A New Parametric Model for Realistic Resistive Bridging Fault Thirteenth IEEE VLSI Test Symposium 184 189 Thirteenth IEEE VLSI Test Symposium 1995-April
    • (1995) , pp. 184-189
    • Renovell, M.1    Hue, P,2    Bertrand, Y.3
  • 8
    • 0025597220 scopus 로고
    • On Detecting Single and Multiple Bridging Faults in CMOS Circuits Using The Current Supply Monitoring Method
    • K. Lee M. A. Breuer On Detecting Single and Multiple Bridging Faults in CMOS Circuits Using The Current Supply Monitoring Method Proceedings of the International Symposium on Circuits and Systems 5 8 Proceedings of the International Symposium on Circuits and Systems 1990-May
    • (1990) , pp. 5-8
    • Lee, K.1    Breuer, M.A.2
  • 9
    • 0025479347 scopus 로고
    • On the Charge Sharing Problem in CMOS Stuck-Open Fault Testing
    • K. Lee M. A. Breuer On the Charge Sharing Problem in CMOS Stuck-Open Fault Testing International Test Conference 417 426 International Test Conference 1990-September
    • (1990) , pp. 417-426
    • Lee, K.1    Breuer, M.A.2
  • 10
    • 33747339547 scopus 로고
    • Contiaints for Using IDDQ Testing to Detect CMOS Bridging Faults
    • K. Lee M. A. Breuer Contiaints for Using IDDQ Testing to Detect CMOS Bridging Faults IEEE VLSI Test Symposium 303 308 IEEE VLSI Test Symposium 1991-April
    • (1991) , pp. 303-308
    • Lee, K.1    Breuer, M.A.2
  • 11
    • 85176685303 scopus 로고
    • The Basics of Low-Power Circuit Design
    • Lower-Power/Low Voltage IC Design Short Course Presented by MEAD Microelectronics Inc. CA, Santa Clara
    • A. Chandrakasan The Basics of Low-Power Circuit Design 2 50 17-21 April 1995 Lower-Power/Low Voltage IC Design Short Course Presented by MEAD Microelectronics Inc. CA, Santa Clara
    • (1995) , pp. 2-50
    • Chandrakasan, A.1
  • 12
    • 0028498832 scopus 로고
    • Series-Parallel Association of FET's for High Gain and High Frequency Applications
    • C. Galup-Montoro M. C. Schneider I. J. B. Loss Series-Parallel Association of FET's for High Gain and High Frequency Applications IEEE Journal of Solid-State Circuits 29 9 1094 1101 September 1994
    • (1994) IEEE Journal of Solid-State Circuits , vol.29 , Issue.9 , pp. 1094-1101
    • Galup-Montoro, C.1    Schneider, M.C.2    Loss, I.J.B.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.