Solder bump size and shape modeling and experimental validation

IEEE Transactions on Components Packaging and Manufacturing Technology Part B

Volumn 20, Issue 4, 1997, Pages 452-457

  Pfeifer, M J ^a  

^a MOTOROLA INC   (United States)

Author keywords

Capillarity; Flip chip; Solder bump height; Solder bump radius; Solder bumps

Indexed keywords

CAPILLARITY; INTEGRATED CIRCUIT TESTING; MATHEMATICAL MODELS; SILICON WAFERS; SOLDERING; SURFACE TENSION;

SOLDER BUMPS; TRUNCATED SPHERE MODEL;

FLIP CHIP DEVICES;

EID: 0031269928     PISSN: 10709894     EISSN: None     Source Type: Journal    
DOI: 10.1109/96.641514     Document Type: Article

References (4)

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2. L. S. Goldmann, "Geometric optimization of controlled collapse interconnections," IBM J. Res. Develop., vol. 13, pp. 251-265, 1969.
3. J. F. Padday, "The profiles of axially symmetric menisci," in Proc. Royal Soc., 1971, vol. 269, pp. 265-293.
4. J. Salonen and J. Salmi, "Test chip and process design for evaluating flip chip technology," in Proc. ITAP Flip Chip, San Jose, 1994, pp. 87-98.