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Volumn 34, Issue 9, 1997, Pages 1-14

Using integer linear programming for instruction scheduling and register allocation in multi-issue processors

Author keywords

Compiler optimization; Instruction scheduling; Integer linear programming; Processor architecture; Register allocation

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; CODES (SYMBOLS); COMPUTER ARCHITECTURE; INTEGER PROGRAMMING; LINEAR PROGRAMMING; PARALLEL PROCESSING SYSTEMS; RESOURCE ALLOCATION;

EID: 0031268141     PISSN: 08981221     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0898-1221(97)00184-3     Document Type: Article
Times cited : (37)

References (23)
  • 3
    • 30244485172 scopus 로고
    • The importance of prepass code scheduling for superscalar and superpipelined processors
    • University of Illinois, Urbana-Champaign, IL
    • D.M. Lavery, P.P. Chang and W.W. Hwu, The importance of prepass code scheduling for superscalar and superpipelined processors, Technical Report No. CRHC-91-18, University of Illinois, Urbana-Champaign, IL, (1991).
    • (1991) Technical Report No. CRHC-91-18
    • Lavery, D.M.1    Chang, P.P.2    Hwu, W.W.3
  • 9
    • 0016313256 scopus 로고
    • A comparison of list schedules for parallel processing systems
    • Adam, A comparison of list schedules for parallel processing systems, Communications of the ACM, 685-690, (1974).
    • (1974) Communications of the ACM , pp. 685-690
    • Adam1
  • 10
    • 0019595341 scopus 로고
    • Some experiments in local microcode compaction for horizontal machines
    • S. Davidson, Some experiments in local microcode compaction for horizontal machines, IEEE Transactions on Computers, 460-477, (1982).
    • (1982) IEEE Transactions on Computers , pp. 460-477
    • Davidson, S.1
  • 19
    • 84907987083 scopus 로고
    • Register allocation and code scheduling for load/discretionary store architectures
    • University of Wisconsin-Madison
    • W. Hsu, Register Allocation and code scheduling for load/discretionary store architectures, In Computer Science Technical Report #722, University of Wisconsin-Madison, (1987).
    • (1987) Computer Science Technical Report #722
    • Hsu, W.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.