High-throughput, low-memory applications on the Pica architecture

IEEE Transactions on Parallel and Distributed Systems

Volumn 8, Issue 10, 1997, Pages 1055-1067

  Wills, D Scott ^a,b   Cat, Huy H ^b   Cruz Rivera, José ^a,b   Lacy, W Stephen ^a,b   Baker Jr , James M ^b   Eble, John C ^a,b   López Lagunas, Abelardo ^a,b   Hopper, Michael ^a,b  

^a IEEE   (United States)

^b GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

Fine grain parallelism; Image processing architectures; MIMD architectures; Through wafer interconnects

Indexed keywords

ALGORITHMS; DATA COMPRESSION; EFFICIENCY; IMAGE PROCESSING; IMAGE RECONSTRUCTION; OBJECT RECOGNITION; PARALLEL PROCESSING SYSTEMS;

LOW MEMORY ARCHITECTURE;

COMPUTER ARCHITECTURE;

EID: 0031251356     PISSN: 10459219     EISSN: None     Source Type: Journal    
DOI: 10.1109/71.629488     Document Type: Article

References (26)

1. A. Agarwal, J. Kubiatowicz, D. Kranz, B.-H. Lim, D. Yeung, G. D'Souza, and M. Parkin, "Sparcle: An Evolutionary Processor Design for Large-scale Multiprocessors," IEEE Micro, June 1993.
2. R. Alverson, D. Callahan, D. Cummings, B. Koblenz, A. Porterfield, and B. Smith, "The Tera Computer System," Proc. Int'l Symp. Computer Architecture, pp. 1-6, Sept. 1990.
3. W.C. Athas and C.L. Seitz, "Multicomputers: Message-Passing Concurrent Computers," Computer, vol. 21, no. 8, pp. 9-24, Aug. 1988.
4. C.S. Butler and M.I. Miller, "Maximum a Posteriori Estimation for SPECT Using Regularization Techniques on Massively Parallel Computers," IEEE Trans. Medical Imaging, vol. 12, pp. 84-89, Mar. 1993.
5. C.M. Chen, S.Y. Lee, and Z.H. Cho, "Parallelization of the EM Algorithm for 3-D PET Image Reconstruction," IEEE Trans. Medical Imaging, vol. 10, pp. 513-522, Dec. 1991.
6. J.L. Cruz-Rivera, E.V.R. DiBella, D.S. Wills, T.K. Gaylord, and E.N. Glytsis, "Parallelized Formulation of the Maximum Likelihood Expectation Maximization Algorithm for Fine-Grain Message-passing Architectures," IEEE Trans. Medical Imaging, pp. 758-762, Dec. 1995.
7. W.J. Dally, J.A.S. Fiske, J.S. Keen, R.A. Lethin, M.D. Noakes, P.R. Nuth, R.E. Davison, and G.A. Fyler, "The Message-Driven Processor: A Multicomputer Processor Node with Efficient Mechanisms," IEEE Micro, vol. 12, no. 2, pp. 23-39, Apr. 1992.
8. G.C. Fox et al., "Matrix Algorithms on a Hypercube I: Matrix Multiplication," Parallel Computing, vol. 4, no. 1, 1987.
9. T.M. Guerrero, S.R. Cherry, M. Dahlbom, A.R. Ricci, and E.J. Hoffman, "Fast Implementations of 3D PET Reconstruction Using Vector and Parallel Programming Techniques," IEEE Trans. Nuclear Science, vol. 40, pp. 1,082-1,086, Aug. 1993.
10. R. Gupta and M. Epstein, "Achieving Low Cost Synchronization in a Multiprocessor System," PARLE '89, Future Generations Computer Systems, vol. 6, no. 3, pp. 255-269, Eindhoven, The Netherlands, Dec. 1990.
11. S.W. Keckler, "A Coupled Multi-ALU Processing Node for a Highly Parallel Computer," Technical Report. 1355, Massachusetts Inst. of Technology Artificial Intelligence Laboratory, Cambridge, Mass., 1992.
12. S.W. Keckler and W.J. Dally, "Processor Coupling: Integrating Compile Time and Runtime Scheduling for Parallelism," Proc. 19th Ann. Int'l Symp. Computer Architecture, pp. 202-213, 1992.
13. S. Lacy, J. Cruz-Rivera, and D.S. Wills, "The Offset Cube: A Three-Dimensional Multicomputer Network Topology Using Through-Wafer Optics," Submitted to IEEE Trans. Parallel and Distributed Systems.
14. D. May, R. Sheperd, and P. Thompson, "The T9000 Transputer," Proc. 1992 Int'l Conf. Computer Design: VLSI in Computers and Processors, pp. 209-212, Oct. 1992.
15. A.W. McCarthy and M.I. Miller, "Maximum Likelihood SPECT in Clinical Computation Times Using Mesh-Connected Parallel Computers," IEEE Trans. Medical Imaging, vol. 10, pp. 426-436, Sept. 1991.
16. R.S. Nikhil, G.M. Papadopoulos, and Arvind. "*T: A Multithreaded Massively Parallel Architecture," Proc. 19th Ann. Int'l Symp. Computer Architecture, pp. 156-167, 1992.
17. P.R. Nuth, "The Named-State Register File," PhD dissertation, Massachusetts Inst. of Technology, Aug. 1993.
18. P.R. Nuth and W.J. Dally, "A Mechanism for Efficient Context Switching," Proc. 1991 IEEE Int'l Conf. Computer Design: VLSI in Computers and Processors, pp. 301-304, Oct. 1991.
19. L.A. Shepp and Y. Vardi, "Maximum Likelihood Reconstruction for Emission Tomography," IEEE Trans. Medical Imaging, vol. 1, pp. 113-121, Oct. 1982.
20. B. Smith, "The Architecture of HEP," Parallel MIMD Computation: HEP Supercomputer and Its Application, J.S. Kowalik, ed., chapter 1, pp. 41-55. MIT Press, 1985.
21. B.J. Smith, "Architecture and Applications of the HEP Multiprocessor Computer System," SPIE, vol. 298, pp. 241-248, 1981.
22. M.R. Thistle and B.J. Smith, "A Processor Architecture for Horizon," Proc. Supercomputing '88, pp. 35-41, Nov. 1988.
23. G.K. Wallace, "Overview of the JPEG (ISO/CCITT) Still Image Compression Standard," SPIE Advent Technology Series, vol. AT 1, pp. 358-371.
24. D.S. Wills and W.J. Dally, "Pi: A Parallel Architecture Interface," Proc. Fourth Symp. Frontiers of Massively Parallel Computation, pp. 345-352, Oct. 1992.
25. D.S. Wills, W.S. Lacy, C. Camperi-Ginestet, B. Buchanan, H.H. Cat, S. Wilkinson, M. Lee, N.M. Jokerst, and M.A. Brooke, "A Three-Dimensional High-Throughput Architecture Using Through-Wafer Optical Interconnect," IEEE J. Lightwave Technology, vol. 13, no. 6, pp. 1,085-1,092, June 1995.
26. A. Wolfe and J.P. Shen, "A Variable Instruction Stream Extension to the VLIW Architecture," Proc. Fourth Int'l Conf. Architectural Support for Programming Languages and Operating Systems, pp. 2-14, Apr. 1991.