Thermionic-emission-based barrier height analysis for precise estimation of charge handling capacity in ccd registers

IEEE Transactions on Electron Devices

Volumn 44, Issue 10, 1997, Pages 1588-1592

  Kawai, ShiN'Ichi ^a   Mutoh, Nobuhiko ^a   Teranishi, Nobukazu ^a  

^a NEC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; CHARGE CARRIERS; CHARGE TRANSFER; COMPUTER SIMULATION; ELECTRIC CURRENTS; IMAGE SENSORS; SEMICONDUCTOR QUANTUM WELLS;

CHARGE HANDLING CAPACITY; POTENTIAL BARRIER HEIGHT; THERMIONIC EMISSION;

CHARGE COUPLED DEVICES;

EID: 0031249401     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.628808     Document Type: Article

References (6)

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2. G. Yang C. Ye and W. F. KosonockySimulation of high-density CCD imager structures 1995 IEEE Workshop on Charge-Coupled Devices and Advanced Image Sensors Dana Point CA Apr. 1995.
3. J. Pinter J. Bishop J. Janesick and T. Elliott2D-modeling of charge-coupled devices: Optimum design and operation for maximum charge handling capability IEEE Workshop on Charge-Coupled Devices and Advanced Image Sensors Dana Point CA Apr. 1995.
4. N. Teranish A. Kohno Y. Ishihara E. Oda and K. AraiAn interline ccd image sensor with reduced image lagIEEE Trans. Electron Devices vol. ED-31 pp. 1829-1833 Dec. 1984.
5. S. M. Sze Physics of Semiconductor Deceives 2nd ed. New York: Wiley 1981 p. 264.
6. Y. Ishihara E. Oda H. Tanigawa N. Teranishi E. Takeuchi I. Akiyama K. Arai M. Nishimura and T. KamataInterline CCD image sensor with an anti blooming structurein ISSCC Dig. Tech. Papers 1982 pp. 168-169.