Design of due date assignment model and the determination of flow time control parameters for the wafer fabrication factories

IEEE transactions on components, packaging and manufacturing technology. Part C. Manufacturing

Volumn 20, Issue 4, 1997, Pages 278-287

  Chung, Sh H ^a   Yang, M H ^a   Cheng, Ch M ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; CONSTRAINT THEORY; DATA REDUCTION; FABRICATION; MATHEMATICAL MODELS; PERFORMANCE; TIME MEASUREMENT;

WAFER FABRICATION;

WSI CIRCUITS;

EID: 0031246943     PISSN: 10834400     EISSN: None     Source Type: Journal    
DOI: 10.1109/3476.650959     Document Type: Article

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