An on-wafer test structure to measure the effect of thermally-induced stress on silicon devices

Microelectronics Reliability

Volumn 37, Issue 10-11, 1997, Pages 1441-1444

  Haddab, Y ^a   Manic, D ^a   Popovic, R S ^a  

^a EPFL   (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

CHEMICAL VAPOR DEPOSITION; ELECTRIC PROPERTIES; ELECTRIC VARIABLES MEASUREMENT; ION IMPLANTATION; SEMICONDUCTING SILICON; SEMICONDUCTOR DEVICE TESTING; SEMICONDUCTOR DOPING; SUBSTRATES;

ON WAFER TEST STRUCTURE; THERMALLY INDUCED STRESS;

SEMICONDUCTOR DEVICE STRUCTURES;

EID: 0031245835     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0026-2714(97)00082-6     Document Type: Article

References (6)

1. S. M. Hu, "Stress-related problems in silicon technology," J. Appl. Phys., vol. 70, pp. R53 (1991).
2. F. Louchet, J. Pelissier, D. Caillard, J. P. Peyrade, C. Levade, and G. Vanderschaeve, "In Situ TEM study of dislocation mobility in semiconducting materials," Microsc. Microanal. Microstruct., vol. 4, pp. 199 (1993).
3. S. M. Hu, "Effecs of surface films and film edges on dislocation movement in silicon," J. Appl. Phys., vol. 46, pp. 1465 (1975).
4. Y. Kanda, "A graphical representation of the piezoresistance coefficients in silicon," IEEE Trans. Electron Dev., vol. ED-29, pp. 64 (1982).
5. F. Shimura, Oxygen in silicon, vol. 42. London: Academic Press Inc. (1994).
6. K. Sumino, "Dislocation behavior and mechanical strenghts of Float-Zone Silicon Crystals and Czochralski Silicon Crystal," presented at Semiconductor Silicon (1981).