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Volumn 14, Issue 4, 1997, Pages 42-51

Interface design for core-based systems

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPUTER HARDWARE DESCRIPTION LANGUAGES; COMPUTER SIMULATION; DATA STORAGE EQUIPMENT; DIGITAL FILTERS; IMAGE COMPRESSION; INTEGRATED CIRCUIT LAYOUT; SPECIFICATIONS; SYSTEMS ANALYSIS;

EID: 0031245825     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/54.632880     Document Type: Article
Times cited : (10)

References (9)
  • 2
    • 0029346301 scopus 로고
    • Seven More Myths of Formal Methods
    • July
    • J.P. Bowen, "Seven More Myths of Formal Methods," IEEE Software, Vol. 12, July 1995, pp. 34-41.
    • (1995) IEEE Software , vol.12 , pp. 34-41
    • Bowen, J.P.1
  • 5
    • 0022020113 scopus 로고
    • A Temporal Logic for Multilevel Reasoning about Hardware
    • Feb.
    • B.C. Moszkowski, "A Temporal Logic for Multilevel Reasoning about Hardware," Computer, Vol. 18, No. 2, Feb. 1985, pp. 10-19.
    • (1985) Computer , vol.18 , Issue.2 , pp. 10-19
    • Moszkowski, B.C.1
  • 7
    • 0002834731 scopus 로고
    • Formalized Timing Diagrams
    • IEEE Computer Society Press, Los Alamitos, Calif.
    • G. Borriello, "Formalized Timing Diagrams," Proc. Third European Design Automation Conf., IEEE Computer Society Press, Los Alamitos, Calif., 1992, pp. 372-377.
    • (1992) Proc. Third European Design Automation Conf. , pp. 372-377
    • Borriello, G.1
  • 8
    • 2342418657 scopus 로고
    • An Algorithm for Exact Bounds on the Time Separation of Events in Concurrent Systems
    • Nove.
    • H. Hulgaard et al., "An Algorithm for Exact Bounds on the Time Separation of Events in Concurrent Systems," IEEE Trans. Computers, Vol. 44, No. 11, Nove. 1995, pp. 1306-17.
    • (1995) IEEE Trans. Computers , vol.44 , Issue.11 , pp. 1306-1317
    • Hulgaard, H.1
  • 9
    • 0023345177 scopus 로고
    • A Test Design Methodology for Protocol Testing
    • May
    • B. Sarikaya, G.V. Bochmann, and E. Cerny, "A Test Design Methodology for Protocol Testing," IEEE Trans. Software Eng., Vol. 13, No. 5, May 1987, pp. 518-531.
    • (1987) IEEE Trans. Software Eng. , vol.13 , Issue.5 , pp. 518-531
    • Sarikaya, B.1    Bochmann, G.V.2    Cerny, E.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.