A Linear Systolic Array for Real-Time Morphological Image Processing

Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology

Volumn 17, Issue 1, 1997, Pages 43-55

  Diamantaras, K I ^a,c,d,e,f,g   Kung, S Y ^b  

^a ARISTOTLE UNIVERSITY OF THESSALONIKI   (Greece)

^b Princeton University   (United States)

^c Natl Technical University of Athens ^*

^d NATIONAL TECHNICAL UNIVERSITY OF ATHENS   (Greece)

^e PRINCETON UNIVERSITY   (United States)

^f SIEMENS CORPORATE RESEARCH   (United States)

^g IEEE   (Greece)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER ARCHITECTURE; IMAGE PROCESSING; MATHEMATICAL MORPHOLOGY; PARALLEL PROCESSING SYSTEMS; REAL TIME SYSTEMS; VIDEO SIGNAL PROCESSING;

LOCALLY PARALLEL GLOBALLY SEQUENTIAL (LPGS) PARTITIONING;

SYSTOLIC ARRAYS;

EID: 0031222122     PISSN: 13875485     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

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