Reconfigurable FPGAs for data compression in ultrasonic non-destructive testing

IEE Colloquium (Digest)

Volumn , Issue 301, 1997, Pages

  Darlington, David J ^a   Campbell, Douglas R ^a   Lines, David ^b  

^a UNIVERSITY OF THE WEST OF SCOTLAND   (United Kingdom)

^b DIAGNOSTIC SONAR LTD   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

DATA COMPRESSION; INTERFACES (COMPUTER); MICROPROCESSOR CHIPS; NONDESTRUCTIVE EXAMINATION; TESTING;

FIELD PROGRAMMABLE GATE ARRAYS;

ULTRASONIC IMAGING;

EID: 0031221219     PISSN: 09633308     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (6)

1. Jeremy Bennett, David Lines, Design of a Cost-Effective Ultrasonic Array System for Rapid Weld Inspection, NDT '97, Cheltenham 16-18 September 1997.
2. Josef Krautkramer, Herbert Krautkramer, Ultrasonic Testing of Materials (3rd edition), Springer-Verlag 1975.
3. Gregory Ray Goslin, Implement DSP functions in FPGAs to reduce cost and boost performance, EDN October 10 1996, pp.155-164.
4. Pierre Popovic, Reconfigurable FPGA-based co-processor accelerates DSP, Electronic Product Design February 1997 pp.23-25.
5. Bradly Fawcett, Reconfigurable Computing: Coming of Age, XCELL #22, Third Quarter 1996 pp.2-5.
6. Steven A. Guccione, Software for Reconfigurable Computing, Embedded Systems Programming, July 1997 pp.39-41.