All-digital PLL with extended tracking capabilities

Electronics Letters

Volumn 33, Issue 18, 1997, Pages 1519-1521

  Lorenzo Ginori, J V ^a   Naranjo Bouzas, J A ^a  

^a CENTRAL UNIVERSITY OF LAS VILLAS   (Cuba)

Author keywords

Digital circuits; Phase locked loops

Indexed keywords

ALGORITHMS; BANDWIDTH; COMPUTER SIMULATION; DIGITAL CIRCUITS; PHASE COMPARATORS; SIGNAL TO NOISE RATIO; SPURIOUS SIGNAL NOISE;

SINUSOIDAL CHIRP TRACKING;

PHASE LOCKED LOOPS;

EID: 0031212740     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:19971073     Document Type: Article

References (4)

1. LINDSEY, W.C., and CHIE, C.M.: 'A survey of digital phase locked loops', Proc. IEEE, 1981, 69, pp. 410-431
2. LANGSTON, J.L.: 'μC chip implements high speed modems digitally', Electron. Des., 1982, pp. 109-116
3. SARKAR, B.C., and CHATTOPADHYAY. S.: 'A new look into the acquisition properties of a second-order digital phase locked loop', IEEE Trans. Commun., 1994, 42, (5), pp. 2087-2091
4. BOASHASH, B.: 'Estimating and interpreting the instantaneous frequency of a signal', Proc. IEEE, 1992, 80, (4), pp. 519-568