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Volumn 43, Issue 3, 1997, Pages 628-632

An HDTV Video Coder IC for ATV receivers

Author keywords

[No Author keywords available]

Indexed keywords

DECODING; HIGH DEFINITION TELEVISION; IMAGE CODING; IMAGE COMPRESSION; INTEGRATED CIRCUIT LAYOUT; RANDOM ACCESS STORAGE; STANDARDS; TELEVISION RECEIVERS;

EID: 0031212388     PISSN: 00983063     EISSN: None     Source Type: Journal    
DOI: 10.1109/30.628686     Document Type: Article
Times cited : (9)

References (5)
  • 3
    • 33747783352 scopus 로고
    • Architecture and Implementation of ICs for a DSC-HDTV Video Decoder System
    • Oct
    • Duardo, O., et. al., "Architecture and Implementation of ICs for a DSC-HDTV Video Decoder System", IEEE Micro, Oct 1992.
    • (1992) IEEE Micro
    • Duardo, O.1
  • 4
    • 33747788500 scopus 로고    scopus 로고
    • A Display Processor Conforming to All ATV Formats
    • June
    • Hosotani, S., et al., "A Display Processor Conforming To All ATV Formats", 1997 ICCE, June 1997.
    • (1997) 1997 ICCE
    • Hosotani, S.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.