A comprehensive submicrometer MOST delay model and its application to CMOS buffers

IEEE Journal of Solid-State Circuits

Volumn 32, Issue 8, 1997, Pages 1254-1262

  Cocchini, Pasquale ^a,b,c   Piccinini, Gianluca ^a,b   Zamboni, Maurizio ^a  

^a POLITECNICO DI TORINO   (Italy)

^b Polytechnic of Turin ^*  (Italy)

^c Dept of Elec Engineering Systems ^*  (United States)

Author keywords

Circuit optimization; Delay effects; Integrated circuit modeling

Indexed keywords

ALGORITHMS; BUFFER CIRCUITS; COMPUTER AIDED NETWORK ANALYSIS; COMPUTER SIMULATION; DELAY CIRCUITS; DIGITAL CIRCUITS; MOSFET DEVICES; OPTIMIZATION; SEMICONDUCTOR DEVICE MODELS;

SOFTWARE PACKAGE SPICE; SUBMICROMETER CMOS DIGITAL CIRCUITS;

CMOS INTEGRATED CIRCUITS;

EID: 0031208188     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.604081     Document Type: Article

References (11)

1. N. Hedenstierna and K. O. Jeppson, "CMOS circuit speed and buffer optimization," IEEE Trans. Computer-Aided Design, vol. CAD-6, pp. 270-281, Mar. 1987.
2. T. Sakurai and A. R. Newton, "Alpha-power law MOSFET model and its applications to CMOS inverter delay and other formulas," IEEE J. Solid-State Circuits, vol. 25, pp. 584-594, Apr. 1990.
3. S. Dutta, S. S. M. Shetti, and S. L. Lusky, "A comprehensive delay model for CMOS inverters," IEEE J. Solid-State Circuits, vol. 30, pp. 864-871, Aug. 1995.
4. K. O. Jeppson, "Modeling the influence of the transistor gain ratio and the input-to-output coupling capacitance on the CMOS inverter," IEEE J. Solid-State Circuits, vol. 29, pp. 646-654, June 1994.
5. G. Massobrio and P. Antognetti, Semiconductor Modeling with SPICE. New York: McGraw-Hill, 1993.
6. A. Bellaouar, S. Embabi, and M. I. Elmasry, "Scaling of digital BiCMOS circuits," IEEE J. Solid-State Circuits, vol. 25, pp. 932-941, 1990.
7. S. R. Vemuru and A. R. Thorbjornsen, "Variable-taper CMOS buffers," IEEE J. Solid-State Circuits, vol. 26, pp. 1265-1269, Sept. 1991.
8. P. Cocchini, G. Piccinini, and M. Zamboni, "Accurate technology independent models for submicron CMOS and BiCMOS circuits," in Proc. IEEE 8th Mediterranean Electrotechnical Conf., May 1996, vol. III, pp. 1267-1270.
9. Y. P. Tsividis, Operation and Modeling of the MOS Transistor. New York: McGraw-Hill, 1987.
10. S. M. Sze, Physics of Semiconductor Devices. New York: Wiley, 1981.
11. C. Mead and L. Conway, Introduction to VLSI Systems. Reading, MA: Addison-Wesley, 1980.