A single chip motion JPEG codec LSI

IEEE Transactions on Consumer Electronics

Volumn 43, Issue 3, 1997, Pages 418-422

  Okada, S ^a   Matsuda, Y ^a   Watanabe, T ^a   Kondo, K ^a  

^a SANYO ELECTRIC CO LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

DATA COMPRESSION; DECODING; IMAGE CODING; IMAGE PROCESSING; LSI CIRCUITS; RANDOM ACCESS STORAGE; SIGNAL PROCESSING;

HIGH SPEED IMAGE MEMORY; JOINT PHOTOGRAPHIC EXPERT GROUP;

IMAGE COMPRESSION;

EID: 0031206891     PISSN: 00983063     EISSN: None     Source Type: Journal    
DOI: 10.1109/30.628651     Document Type: Article

References (2)

1. ISO/IEC JTCI/SC29/WG10, JPEG Committee Draft CD10918, 1991.
2. P. A, Ruetz, et al.,"A Video-Rate JPEG Chip Set", Journal of VLSI Signal Processing, 5, 141-150(1993).