Effects of forward biasing the substrate on the low temperature behaviour of n-MOS transistors

Electronics Letters

Volumn 33, Issue 17, 1997, Pages 1456-1458

  De La Hidalga W , F J ^a,b   Deen, M J ^b   Gutierrez D , E A ^a   Balestra, F ^c  

^a INSTITUTO NACIONAL DE ASTROFÍSICA   (Mexico)

^b SIMON FRASER UNIVERSITY   (Canada)

^c Lab Phys Composants S   (France)

Author keywords

CMOS integrated circuits; MOSFET

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC CURRENTS; MOSFET DEVICES; SUBSTRATES; THERMAL EFFECTS;

FORWARD BIASING EFFECTS;

INTEGRATED CIRCUITS;

EID: 0031199216     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:19970982     Document Type: Article

References (4)

1. DEEN, M.J.: 'Cryogenic operation of CMOS-based microsystems and computers', Microprocess. Microsyst., 1989, 13, (4), pp. 245-253
2. FOTY, D.P.: 'The design of deep submicron FETs for low temperature operation'. Proc. Symp. on Low Temperature Electronics and High Temperature Superconductivity, The Electrochemical Society, 1993, Vol. 93-22, pp. 63-74
3. BACCARANI, G., WORDEMAN, M.R., and DENNARD, R.H.: 'Generalized scaling theory and its application to a 1/4 micrometer MOSFET design', IEEE Trans., 1984, ED-31, (4), pp. 452-462
4. GUO, JYH-CHYURN, MING-CHIEN CHANG, CHICK-YUAN LU, CHING-HSIANG HSU, and SHAO-SHIUN CHUNG: 'Transconductance enhancement due to back bias for submicron NMOS-FET', IEEE Trans. Electron Devices, 1995, 42, (2), pp. 288-294