Joint Minimization of Code and Data for Synchronous Dataflow Programs

Formal Methods in System Design

Volumn 11, Issue 1, 1997, Pages 41-70

  Murthy, Praveen K ^a   Bhattacharyya, Shuvra S ^b   Lee, Edward A ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b HITACHI AMERICA LTD   (United States)

Author keywords

Dataflow programming; Dynamic programming; Memory management; Minimum cuts; Multirate signal processing algorithms; On chip memory; SDF compiler; Synchronous dataflow

Indexed keywords

CODES (SYMBOLS); DATA STORAGE EQUIPMENT; DYNAMIC PROGRAMMING; SIGNAL PROCESSING;

ON-CHIP MEMORY; SYNCHRONOUS DATAFLOW;

COMPUTER SOFTWARE;

EID: 0031192495     PISSN: 09259856     EISSN: None     Source Type: Journal    
DOI: 10.1023/A:1008633809454     Document Type: Article

References (28)

1. W.A. Abu-Sufah, D.J. Kuck, and D.H. Lawrie, "On the performance enhancement of paging systems through program analysis and transformations," IEEE Transactions on Computers, Vol. C-30, No. 5, pp. 341-356, May 1981.
2. M. Ade, R. Lauwereins, and J. A. Peperstraete, "Buffer memory requirements in DSP applications," presented at IEEE Workshop on Rapid System Prototyping, Grenoble, June 1994.
3. U. Banerjee, Dependence Analysis for Supercomputing, Kluwer Academic Publishers, 1988.
4. S.S. Bhattacharyya, "Compiling Dataflow Programs for Digital Signal Processing," Ph.D. Thesis, Memorandum No. UCB/ERL M94/52, Electronics Research Laboratory, University of California at Berkeley, July 1994.
5. S.S. Bhattacharyya and E.A. Lee, "Scheduling synchronous dataflow graphs for efficient looping," Journal of VLSI Signal Processing, Vol. 6, No. 3, pp. 271-288, Dec. 1993.
6. S.S. Bhattacharyya, P.K. Murthy, and E.A. Lee, Software Synthesis from Dataflow Graphs, Kluwer Academic Publishers, Norwell, Ma, 1996.
7. S.S. Bhattacharyya, RK. Murthy, and E.A. Lee, "Optimal parenthesization of lexical orderings for DSP block diagrams," Proceedings of the 1995 IEEE Workshop on VLSI Signal Processing, Japan, Oct. 1995.
8. S.S. Bhattacharyya, RK. Murthy, and E.A. Lee, "APGAN and RPMC: Complimentary heuristics for translating DSP block diagrams into software implementations," Design Automation for Embedded Systems Journal, Jan., 1997.
9. J.T. Buck, S. Ha, E.A. Lee, and D.G. Messerschmitt, "Multirate signal processing in Ptolemy," Proceedings of the International Conference on Acoustics, Speech, and Signal Processing, Toronto, April 1991, Vol. 2, pp. 1245-1248.
10. J.T. Buck, S. Ha, E.A. Lee, and D.G. Messerschmitt, "Ptolemy: A framework for simulating and prototyping heterogeneous systems," International Journal of Computer Simulation, Vol. 4, April 1994.
11. T.H. Cormen, C.E. Leiserson, and R.L. Rivest, Introduction to Algorithms, McGraw-Hill, 1990.
12. M.R. Garey and D.S. Johnson, Computers and Intractability - A Guide to the Theory of NP-Completeness, Freeman, 1979.
13. S.S. Godbole, "On efficient computation of matrix chain products," IEEE Transactions on Computers, Vol. C22, No. 9, pp. 864-867, Sept. 1973.
14. R. Govindarajan, G.R. Gao, and P. Desai, "Minimizing memory requirements in rate-optimal schedules," Proceedings of the International Conference on Application Specific Array Processors, San Francisco, Aug. 1994, pp. 75-86.
15. W.H. Ho, E.A. Lee, and D.G. Messerschmitt, "High level dataflow programming for digital signal processing," VLSI Signal Processing III, IEEE Press, 1988.
16. B.W. Kernighan and S. Lin, "An efficient heuristic procedure for partitioning graphs," Bell System Technical Journal, Vol. 49, No. 2, pp. 291-308, Feb. 1970.
17. R. Lauwereins, P. Wauters, M. Ade, and J.A. Peperstraete, "Geometric parallelism and cyclo-static dataflow in GRAPE-II," presented at IEEE Workshop on Rapid System Prototyping, Grenoble, June 1994.
18. R. Lauwereins, M. Engels, J.A. Peperstraete, E. Steegmans, and J. Van Ginderdeuren, "GRAPE: A case tool for digital signal parallel processing," IEEE ASSP Magazine, Vol. 7, No. 2, pp. 32-43, April 1990.
19. E.A. Lee and T.M. Parks, "Dataflow process networks," Proceedings of the IEEE, Vol. 83, No. 5, May, 1995.
20. E.A. Lee, W.H. Ho, E. Goei, J. Bier, and S.S. Bhattacharyya, "Gabriel: A design environment for DSP," IEEE Transactions on Acoustics, Speech, and Signal Processing, Vol. 37, No. 11, pp. 1751-1762, Nov. 1989.
21. E.A. Lee and D.G. Messerschmitt, "Static scheduling of synchronous dataflow programs for digital signal processing," IEEE Transactions on Computers, Vol. C-36, No. 1, pp. 24-35, Jan. 1987.
22. D.R. O'Hallaron, "The assign parallel program generator," Memorandum CMU-CS-91-141, School of Computer Science, Carnegie Mellon University, May 1991.
23. J. Pino, S. Ha, E.A. Lee, and J.T. Buck, "Software synthesis for DSP using ptolemy," Invited Paper in Journal of VLSI Signal Processing, Jan. 1995.
24. S. Ritz, S. Pankert, and H. Meyr, "High level software synthesis for signal processing systems," Proceedings of the International Conference on Application Specific Array Processors, Berkeley, Aug. 1992, pp. 679-693.
25. M. Veiga, J. Parera, and J. Santos, "Programming DSP systems on multiprocessor architectures," Proceedings of the International Conference on Acoustics, Speech, and Signal Processing, Albuquerque, April 1990, Vol. 2, pp. 965-968.
26. M. Wolfe, Optimizing Supercompilers for Supercomputers, MIT Press, 1989.
27. H. Zima and B. Chapman, Supercompilers for Parallel and Vector Computers, ACM Press, 1990.
28. V. Zivojnovic, H. Schraut, M. Willems, and R. Schoenen, "DSPs, GPPs, and multimedia applications - An evaluation using DSPStone," Proceedings of ICSPAT, Nov. 1995.