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Volumn 44, Issue 7, 1997, Pages 593-597

Reduced nonlinear distortion in circuits with correlated double sampling

Author keywords

Correlated double sampling; Linear amplifiers; Low distortion amplifiers; Nonlinear distortion. 1997 ieee

Indexed keywords

CORRELATION METHODS; ELECTRIC DISTORTION; HARMONIC ANALYSIS; OPERATIONAL AMPLIFIERS; SIGNAL DISTORTION;

EID: 0031191206     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.598431     Document Type: Article
Times cited : (10)

References (8)
  • 1
    • 0000076149 scopus 로고
    • A switching scheme for SC filters which reduces the effect of parasitic capacitances associated with switch control terminals
    • Apr.
    • D. G. Haigh and B. Singh, A switching scheme for SC filters which reduces the effect of parasitic capacitances associated with switch control terminals, in Proc. IEEE Int. Symp. Circuits Syst., Apr. 1983, pp. 586-589.
    • (1983) Proc. IEEE Int. Symp. Circuits Syst. , pp. 586-589
    • Haigh, D.G.1    Singh, B.2
  • 2
    • 0022305546 scopus 로고
    • Low-distortion switched-capacitor filter design techniques
    • Dec.
    • K. L. Lee and R. G. Meyer, Low-distortion switched-capacitor filter design techniques, IEEE J. Solid-State Circuits, vol. SC-20, pp. 1013-1113, Dec. 1985.
    • (1985) IEEE J. Solid-State Circuits , vol.VOL. SC-20 , pp. 1013-1113
    • Lee, K.L.1    Meyer, R.G.2
  • 3
    • 0026938433 scopus 로고
    • Harmonic distortion caused by capacitors implemented with MOSFET gates
    • Oct.
    • A. T. Behr, M. C. Schneider, S. N. Filho, and G. C. Montoro, Harmonic distortion caused by capacitors implemented with MOSFET gates, IEEE J. Solid-State Circuits, vol. 27, pp. 1470-1475, Oct. 1992.
    • (1992) IEEE J. Solid-State Circuits , vol.27 , pp. 1470-1475
    • Behr, A.T.1    Schneider, M.C.2    Filho, S.3    Montoro, G.C.4
  • 4
  • 6
    • 0023250092 scopus 로고
    • SC building blocks with reduced sensitivity to finite amplifier gain, bandwidth and offset voltage
    • May
    • L. E. Larson and G. C. Temes, SC building blocks with reduced sensitivity to finite amplifier gain, bandwidth and offset voltage, in Proc. IEEE Int. Symp. Circuits Syst., May 1987, pp. 334-338.
    • (1987) Proc. IEEE Int. Symp. Circuits Syst. , pp. 334-338
    • Larson, L.E.1    Temes, G.C.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.