메뉴 건너뛰기




Volumn 9, Issue 7, 1997, Pages 1029-1031

Optical interconnections for the massively parallel computer

Author keywords

Computer interfaces; Data communication; Multiprocessor interconection; Optical communication equipment; Optical interconnection; Photodetectors; Semiconductor lasers arrays

Indexed keywords

COMPUTER WORKSTATIONS; INTEGRATED OPTOELECTRONICS; INTERFACES (COMPUTER); OPTICAL CABLES; OPTICAL COMMUNICATION EQUIPMENT; PARALLEL PROCESSING SYSTEMS; PHOTODETECTORS; SEMICONDUCTOR LASERS;

EID: 0031189136     PISSN: 10411135     EISSN: None     Source Type: Journal    
DOI: 10.1109/68.593389     Document Type: Article
Times cited : (12)

References (9)
  • 1
    • 0026401960 scopus 로고
    • Use of guided wave optics for broad level and mainframe level interconnects
    • D. H. Hartman, "Use of guided wave optics for broad level and mainframe level interconnects," in Proc. 41st ECTC, 1991, pp. 463-474.
    • (1991) Proc. 41st ECTC , pp. 463-474
    • Hartman, D.H.1
  • 2
    • 0028375877 scopus 로고
    • 200-MB/s/ch 100-m optical subsystem interconnections using 8-ch 1.3 mm laser diode arrays and single mode fiber arrays
    • A. Takai T. Kato, S. Yamashita, S. Hanatani, Y. Motegi, K. Ito, and H. Abe, "200-MB/s/ch 100-m optical subsystem interconnections using 8-ch 1.3 mm laser diode arrays and single mode fiber arrays," J. Lightwave Technal., vol. 12, pp. 260-270, 1994.
    • (1994) J. Lightwave Technal. , vol.12 , pp. 260-270
    • Takai, A.1    Kato, T.2    Yamashita, S.3    Hanatani, S.4    Motegi, Y.5    Ito, K.6    Abe, H.7
  • 3
    • 3843057874 scopus 로고
    • Fully integrated error-free optical subsystem interconnections
    • S. Hanatani, A. Takai, H. Abe, Y. Motegi, and H. Kodera, " Fully integrated error-free optical subsystem interconnections," IEEE Denshi Tokyo, no. 32, pp. 194-198, 1993.
    • (1993) IEEE Denshi Tokyo , Issue.32 , pp. 194-198
    • Hanatani, S.1    Takai, A.2    Abe, H.3    Motegi, Y.4    Kodera, H.5
  • 4
    • 3843081746 scopus 로고    scopus 로고
    • Optical subsystem interconnections with large throughputs for the massively parallel computer RWC-1
    • Sendai, Japan, Apr.
    • S. Hanatani, S. Nishimura, and H. Matsuoka, "Optical subsystem interconnections with large throughputs for the massively parallel computer RWC-1," in Proc. OC/PS'96, OWC7, Sendai, Japan, Apr. 1996, pp. 112-113.
    • (1996) Proc. OC/PS'96, OWC7 , pp. 112-113
    • Hanatani, S.1    Nishimura, S.2    Matsuoka, H.3
  • 5
    • 0030387282 scopus 로고    scopus 로고
    • 12-channel fully-integrated CMOS-interface optical interconnect modules with an operating voltage of +3.3 V
    • Boston, MA, Nov. paper WI5
    • S. Hanatani, A. Miura, S. Kaneko, A. Oishi, and A. Takai, "12-channel fully-integrated CMOS-interface optical interconnect modules with an operating voltage of +3.3 V," presented at LEOS'96, Boston, MA, Nov. 1996, paper WI5.
    • (1996) LEOS'96
    • Hanatani, S.1    Miura, A.2    Kaneko, S.3    Oishi, A.4    Takai, A.5
  • 7
    • 0029475523 scopus 로고
    • A prototype router for the massively parallel computer RWC-1
    • Austin, TX, Oct.
    • T. Yokota, H. Matsuoka, K. Okamoto, H. Hirono, A. Hori, and S. Sakai, "A prototype router for the massively parallel computer RWC-1," in Pmc. ICCD'95, Austin, TX, Oct. 1995, pp. 279-284.
    • (1995) Pmc. ICCD'95 , pp. 279-284
    • Yokota, T.1    Matsuoka, H.2    Okamoto, K.3    Hirono, H.4    Hori, A.5    Sakai, S.6
  • 8
    • 0030418979 scopus 로고    scopus 로고
    • Optical interconnections for the massively parallel computer
    • Boston, MA, Nov. paper WI1
    • S. Nishimura, H. Inoue, S. Hanatani, H. Matsuoka, and T. Yokota, "Optical interconnections for the massively parallel computer," presented at LEOS'96, Boston, MA, Nov. 1996, paper WI1.
    • (1996) LEOS'96
    • Nishimura, S.1    Inoue, H.2    Hanatani, S.3    Matsuoka, H.4    Yokota, T.5


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.